Fast Fourier Transform Vitis HLS Implementation
Features of the lesson package (paid content)
➢ Fully pipelined implementation of FFT with fixed-point arithmetic in Vitis HLS
➢ Vitis HLS implementation of DMA IP core for efficient data transfer
➢ Linux Integration and run-time configuration of the Xilinx xFFT v9.1 IP core
➢ Performance evaluation and analysis of the HLS FFT IP core
➢ Linux deployment for Zynq 7000 SoCs with Buildroot
➢ Tested with Arty z7-20 board
The Educational Package sources
Architecture of FFT Vitis HLS implementation
Vivado Hardware design for Arty z7-20
Synthesis and Implementation report of 1024 FFT points for Arty z7-20
